1. Field of the Invention
This invention relates to amplifiers employing MOS transistors. More particularly, this invention relates to such amplifiers having a CMOS input stage providing wide bandwidth and capable of operation with a large common mode input range.
2. Description of the Prior Art
It is known to provide an amplifier input stage having NMOS and PMOS differential pairs connected in parallel to accommodate a wide common-mode input range, as described for example in the article by Pardoen and DeGrauwe "A Rail-to-Rail Input/Output CMOS Power Amplifier", published in the IEEE Journal of Solid State Circuits, April, 1990. FIG. 1 of this application was taken from that article. The circuit of FIG. 1 uses NMOS and PMOS differential pairs 10, 12 connected in parallel between the supply rails V.sub.dd and V.sub.cc. The differential pairs 10, 12 are connected to respective current mirrors 14, 16 arranged to combine the output signals at an output line 18. A current source Ip establishes the total (combined) tail currents of both differential pairs.
With this prior art arrangement, the tail currents of each pair will vary linearly with the input voltage level, one current going up, the other down, as the common-mode voltage swings through its range. The sum of the transconductances of both pairs will vary with common-mode voltage so that bandwidth and noise will correspondingly vary with the input signal level, resulting in distortion and unwanted noise in the output signal, and restricting the range of common-node input level variations. The present invention is directed to circuit arrangements which minimize such undesirable properties.